John Joyce
Born: 22nd May 1973
Nationality: British
E-mail:
jcjoyce@iee.org
Web:
http://www.john-joyce.co.uk/
Phone: +44 7890 227981
Address:
available on request
Employment
January 2003 to present. Cambridge
Semiconductor, a spinoff company from Cambridge University Engineering
Department.
2006 to present: Senior Test Engineer. Responsible for systematic test
and characterisation of mixed-signal CMOS integrated circuits at wafer and package level.
- Creation of test specifications for both internal and test development house use,
in liaison with IC design and system design teams
- Detailed understanding of IC implementations, and the system within which they
function, to enable test specifications to be produced and implemented
- Design, production and commissioning of 'rack and stack' style automated test
equipment (ATE) for implementation of test specifications in-house
- Management of software and hardware development by external contractors for in-house
ATE
- Design, production, commissioning and use of automated equipment for long-term power
device reliability investigation
2003 to 2005: Advanced Device
Engineer and then Senior Power Device Engineer.
As a member of the Device & Technology team,
responsibility primarily focussed on practical tasks, including:
- Responsible for wafer level testing of power devices, including specification,
purchase and commissioning of Signatone automated test equipment, and
subsequent custom software design and implementation
- Processing and analysis of data from test equipment to provide the
team with device performance information for future designs
- Detailed device performance assessment and comparison with
competitors' devices
- Packaging and testing of engineering sample parts including circuit
functionality
- Liaison with circuit and applications engineers
- Supervision of vacation students
September to November 2002. Short term contract
Research Associate in Cambridge
University Engineering Department:
- Investigation of
oscillations within IGBT modules using
Silvaco mixed-mode (semiconductor
device and circuit) simulation tools
- Undergraduate tuition and laboratory
demonstrations.
September 2001 to August 2002. Research Technologist at
Alstom Research &
Technology Centre, Stafford (now Areva T&D Technology Centre).
- Design and construction of test rig for characterisation of high-power IGBTs
- Feasibility study of prototyping utility-scale energy storage systems using ultracapacitors
- Characterisation of silicon carbide semiconductor devices
- IGBT modelling using SABER simulation package
April to November 2000 and April to August 2001.
Research Assistant in Cambridge University Engineering Department.
Research on:
- IGBT modelling
- Current measurement techniques
- IGBT operation under short circuit conditions
Co-authored two papers at
international conferences and presented one. Undergraduate tuition and
lab demonstrations.
Education
Studied for PhD in Semiconductor Devices / Power Electronics
under Dr. Patrick Palmer at
Cambridge University Engineering
Department. This involved experimental study and device-level
simulation of high-power IGBT modules, and numerical analysis of
small-signal circuits. Sponsored by GEC Plessey Semiconductors,
now Dynex Semiconductors.
Thesis entitled Current Sharing and Redistribution in High Power
IGBT Modules submitted in May 2001; graduated July 2002.
Co-authored five papers at international
conferences, and presented two of these.
Read Natural Sciences (physics) for two years
followed by Electrical and Information Sciences for two
years at Clare College, Cambridge,
leading to degrees of B.A. (Hons) (1st)
and M.Eng., awarded in 1996.
Award: The Pressed Steel Prize for Engineering
from Clare College (1996)
The King's School, Chester, 1981 to 1991.
A Levels: SMP Maths, SMP Further Maths, Physics,
Chemistry, General Studies (grade A), STEP (Cambridge
supplementary exam) Maths and Chemistry (grade 1)
Award: The Westminster Gold Medal for best A-level
results.
Publications
- F. Udrea, T. Trajkovic, C. Lee, D. Garner, X. Yuan, J. Joyce, N. Udugampola, G. Bonnet, D. Coulson, R. Jacques, M. Izmajlowicz, N. van der Duijn Schouten, Z. Ansari, P. Moyse and G. A. J. Amaratunga:
Ultra-fast LIGBTs and Superjunction Devices in Membrane Technology.
7th International Symposium
On Power Semiconductor
Devices and ICs (ISPSD), Santa Barbara, 2005
- Palmer P.R., Santi E., Hudgins J., Kang X., Joyce J.C., Eng P.Y.:
Circuit Simulator Models for the Diode and IGBT With Full Temperature
Dependent Features. IEEE Transactions on Power Electronics, September 2003
- Palmer P.R., Joyce J.C.: Circuit analysis of active mode
parasitic oscillations in IGBT modules. IEE Proceedings on Circuits, Devices
and Systems April 2003
- Joyce J.C.: Current Sharing and
Redistribution in High Power IGBT Modules, Ph.D. thesis,
Cambridge University Engineering Department, 2001
- Palmer P.R., Joyce J.C., Eng P.Y., Hudgins J., Santi E.,
Dougal R.: Circuit Simulator Models for the Diode and IGBT with full
Temperature-Dependent Features. 32nd Power Electronics Specialists'
Conference, Vancouver, 2001
- Palmer P.R., Rajamani H.S., Joyce J.C.: Behaviour of
IGBT modules under short circuit conditions. IEEE Industrial
Applications Society Annual Meeting, Rome, 2000.
- Palmer P.R., Joyce J.C.: Causes of parasitic current
oscillations in IGBT modules at turn-off. 8th European Conference on
Power Electronics and Applications, Lausanne, 1999.
- Joyce J.C., Palmer P.R.: Some causes of current
redistribution in IGBT modules. 11th International Symposium on Power
Semiconductor Devices, Toronto 1999.
- Palmer P.R., Joyce J.C.: Current redistribution in
multi-chip IGBT modules under various gate drive conditions. Seventh
International Conference on Power Electronics and Variable Speed Drives,
London, 1998.
- Palmer P.R., Joyce J.C., Stark B.H.: Measurement of Chip
Currents in IGBT Modules. 7th European Conference on Power Electronics
and Applications, Trondheim, 1997.
- Palmer P.R., Stark B.H., Joyce J.C.: Non-Invasive
Measurement of Chip Currents in IGBT Modules. 28th Power Electronics
Specialists' Conference, St Louis, 1997.
Skills and Experience
-
Electronics lab experience including design, specification, construction,
testing and use of high voltage and high power test rigs. Use of a range
of electrical
and electronic measurement tools and techniques. Basic mechanical and
workshop skills. Electronic hardware design, prototyping and construction,
including embedded control. Wafer level testing of discrete power
semiconductors and power IC chips. Characterisation of power semiconductors.
Automatic test equipment design, construction and operation. Test specification
generation.
-
Simulation of semiconductor devices using the Silvaco finite element
software suite. Circuit simulation using SABER and PSPICE. System simulation
using Simulink.
-
Undergraduate tuition and lab demonstrations. Proof-reading of M.Phil. and
Ph.D. theses and examination of M.Phil. theses over a range of engineering
disciplines. Supervision of vacation students.
-
Computer hardware maintenance, troubleshooting and upgrading
including specification, purchase and assembly. Networking in heterogeneous
environments.
-
Programming in VB.NET, LabView, C, BBC BASIC and various assemblers including ARM,
6502, and PIC.
Software installation, troubleshooting and support with a range of
computers and operating systems, primarily Windows 95 / NT4 / 2000 / XP
and Acorn RiscOS; some experience with DOS, linux, Solaris; a little
experience with MacOS, OS/2, AIX, hp-ux.
-
Desktop and web publishing including PHP. Document preparation with
Word and data processing with Excel. Some experience with MySQL,
Powerpoint, and Lotus Smartsuite.
Activities
Voluntary work on the
Llangollen Railway in North Wales since 1987. Started with repairing
and maintaining carriages and wagons, and moved on after 6 years to
the railcar group,
restoring, maintaining and driving diesel railcars. Edited, typeset and
published 23 quarterly issues of the in-house magazine Steam at
Llangollen, a magazine typically comprising 48 to 64 pages and 25,000
to 35,000 words,
distributed to approximately 1,200 members quarterly. Creator of the
Railway's website,
and maintainter from 1995 to 2006.
Member of the Institution of
Engineering and Technology.
Competitions Secretary
of Cambridge
University Automobile Club for two years and vice-president
for one year. Organised several club events including two 'Varsity' 12-car
rallies and one 'National B' status navigational rally. Occasional entrant
and marshal.
Junior Treasurer
of Cambridge
University Railway Club for three years and editor of their journal
Eagle for one year.
Last updated
31 Mar 2008 00:00 by John Joyce -
email jcjoyce@iee.org